# Reading C:/Modeltech_pe_edu_10.3/tcl/vsim/pref.tcl 
# do test.fdo 
# ** Warning: (vlib-34) Library already exists at "work".
# 
# Model Technology ModelSim PE Student Edition vcom 10.3 Compiler 2014.01 Jan  6 2014
# Start time: 10:40:33 on Aug 18,2014
# vcom -reportprogress 300 -93 -explicit agosto7.vhd 
# -- Loading package STANDARD
# -- Loading package TEXTIO
# -- Loading package std_logic_1164
# -- Loading package std_logic_arith
# -- Loading package STD_LOGIC_UNSIGNED
# -- Compiling entity agosto7
# -- Compiling architecture Behavioral of agosto7
# End time: 10:40:36 on Aug 18,2014
# Errors: 0, Warnings: 0
# Model Technology ModelSim PE Student Edition vcom 10.3 Compiler 2014.01 Jan  6 2014
# Start time: 10:40:36 on Aug 18,2014
# vcom -reportprogress 300 -93 -explicit test.vhw 
# -- Loading package STANDARD
# -- Loading package TEXTIO
# -- Loading package std_logic_1164
# -- Loading package std_logic_arith
# -- Loading package STD_LOGIC_UNSIGNED
# -- Loading package std_logic_textio
# -- Compiling entity test
# -- Compiling architecture testbench_arch of test
# -- Compiling configuration agosto7_cfg
# -- Loading entity test
# -- Loading architecture testbench_arch of test
# -- Loading entity agosto7
# End time: 10:40:40 on Aug 18,2014
# Errors: 0, Warnings: 0
# //  ModelSim PE Student Edition 10.3 Jan  6 2014 
# //
# //  Copyright 1991-2014 Mentor Graphics Corporation
# //  All Rights Reserved.
# //
# //  THIS WORK CONTAINS TRADE SECRET AND PROPRIETARY INFORMATION
# //  WHICH IS THE PROPERTY OF MENTOR GRAPHICS CORPORATION OR ITS
# //  LICENSORS AND IS SUBJECT TO LICENSE TERMS.
# //
# // NOT FOR CORPORATE OR PRODUCTION USE.
# // THE ModelSim PE Student Edition IS NOT A SUPPORTED PRODUCT.
# // FOR HIGHER EDUCATION PURPOSES ONLY
# //
# vsim -lib work -t 1ps test 
# Start time: 10:40:41 on Aug 18,2014
# Loading std.standard
# Loading std.textio(body)
# Loading ieee.std_logic_1164(body)
# Loading ieee.std_logic_arith(body)
# Loading ieee.std_logic_unsigned(body)
# Loading ieee.std_logic_textio(body)
# Loading work.test(testbench_arch)
# Loading work.agosto7(behavioral)
# .main_pane.wave.interior.cs.body.pw.wf
# .main_pane.structure.interior.cs.body.struct
# .main_pane.objects.interior.cs.body.tree
# ** Failure: Simulation successful (not a failure).  No problems detected. 
#    Time: 3300 ns  Iteration: 0  Process: /test/line__71 File: test.vhw
# Break in Process line__71 at test.vhw line 152
# Simulation Breakpoint: Break in Process line__71 at test.vhw line 152
# MACRO ./test.fdo PAUSED at line 13
# End time: 10:41:50 on Aug 18,2014
# Errors: 0, Warnings: 0
